1. Field of the Invention
The present invention relates generally to chemical mechanical polish (CMP) planarizing methods for planarizing planarizable layers within microelectronics fabrications. More particularly, the present invention relates to endpoint detection methods employed within chemical mechanical polish (CMP) planarizing methods for planarizing planarizable layers within microelectronics fabrications.
2. Description of the Related Art
Integrated circuit microelectronics fabrications are formed from semiconductor substrates within and upon whose surfaces are formed resistors, transistors, diodes and other electrical circuit elements. The electrical circuit elements are connected internally and externally to the semiconductor substrate upon which they are formed through patterned conductor layers which are separated by dielectric layers.
When forming within advanced integrated circuit microelectronics fabrications integrated circuit layers, such as but not limited to integrated circuit conductor layers, integrated circuit semiconductor layers and integrated circuit dielectric layers, it is common in the art of advanced integrated circuit microelectronics fabrication that those integrated circuit layers will be formed with substantial topography, since within advanced integrated circuit microelectronics fabrications increased integrated circuit device density is often achieved through forming high aspect ratio integrated circuit structures upon which are subsequently formed integrated circuit layers.
In order to provide within advanced integrated circuit microelectronics fabrications integrated circuit layers upon which there may subsequently be formed additional integrated circuit structures with enhanced functionality and reliability, it is common in the art of advanced integrated circuit microelectronics fabrication to planarize integrated circuit layers, and in particular to planarize integrated circuit dielectric layers, through chemical mechanical polish (CMP) planarizing methods.
While chemical mechanical polish (CMP) planarizing methods provide within advanced integrated circuit microelectronics fabrications planarized integrated circuit layers upon which there may be formed additional integrated circuit structures with enhanced functionality and reliability, the use of chemical mechanical polish (CMP) planarizing methods for forming planarized integrated circuit layers within advanced integrated circuit microelectronics fabrications is not entirely without problems.
In particular, it is recognized within the art of advanced integrated circuit microelectronics fabrication that it is often difficult to planarize to a reproducible thickness through a chemical mechanical polish (CMP) planarizing method within an advanced integrated circuit microelectronics fabrication an integrated circuit layer when there is not employed a polish stop layer when planarizing through the chemical mechanical polish (CMP) planarizing method the integrated circuit layer. Chemical mechanical polish (CMP) planarized integrated circuit layers with irreproducible thicknesses within advanced integrated circuit microelectronics fabrications are undesirable since they may compromise the functionality or reliability of the advanced integrated circuit microelectronics fabrications into which they are formed.
It is thus in general towards the goal of forming with reproducible thickness within advanced integrated circuit microelectronics fabrications chemical mechanical polish (CMP) planarized integrated circuit layers that the present invention is in part directed. To achieve this goal, it is thus also towards providing methods and materials for monitoring and controlling the endpoints within chemical mechanical polish (CMP) planarizing methods for planarizing integrated circuit layers within advanced integrated circuit microelectronics fabrications that the present invention is consequently also directed.
Various methods been disclosed in the art of integrated circuit microelectronics fabrication for monitoring and/or controlling endpoints of chemical mechanical polish (CMP) planarizing methods employed in planarizing integrated circuit layers within integrated circuit microelectronics fabrications. For example, Yu et al., in U.S. Pat. No. 5,240,552 discloses an acoustic wave reflection method for monitoring and controlling endpoints within chemical mechanical polish (CMP) planarizing methods employed within integrated circuit microelectronics fabrication. In addition, Lustig et al., in U.S. Pat. No. 5,337,015 discloses a leakage current method and apparatus for monitoring and controlling endpoints within chemical mechanical polish (CMP) planarizing methods employed within integrated circuit microelectronics fabrication.
Although not specifically related to monitoring or controlling endpoints within chemical mechanical polish (CMP) planarizing methods employed in planarizing integrated circuit layers within integrated circuit microelectronics fabrications, Kurandt, in U.S. Pat. No. 4,838,697, discloses an apparatus for rapid colorimetric determination of samples of various types. The apparatus employs several light emitting semiconductor photodiodes, as well as a singular photoreceiver.
Desirable in the art are additional methods for monitoring and controlling endpoints within chemical mechanical polish (CMP) planarizing methods employed in planarizing integrated circuit layers within integrated circuit microelectronics fabrications. Particularly desirable in the art are additional methods for monitoring and controlling endpoints within chemical mechanical polish (CMP) planarizing methods employed in planarizing integrated circuit dielectric layers within integrated circuit microelectronics fabrications. It is towards the foregoing objects that the present invention is more specifically directed.